| Popis: |
Noise due to back-gate forward bias between substrate and source of a MOSFET is analyzed and simulated. Noise level is compared between two CMOS circuits with and without back-gate forward bias. It is found that the output noise introduced by the back-gate forward bias method is only a few nV/square root (Hz), which only slightly increases the device noise. A CMOS op-amp is designed utilizing back-gate forward bias technique utilizing a level shift current mirror for operation at ultra low-power in μW range. The designed amplifier dissipates power of 40 uW and operates at ± 0.4 V to achieve a gain of 77 dB. The noise in ultra low-power op-amp is also investigated. The total output noise density is about 30 μV/square root (Hz) in the ultra-low power op-amp design, which is lower than 65 μV/square root (Hz) of standard op-amp. The signal to noise ratio of the ultra low-power op-amp is 44 dB. |
