A 40-to-44Gb/s 3× Oversampling CMOS CDR/1:16 DEMUX

Autor:	Hirotaka Tamura, Nestor Tzartzanis, Y. Okaniwa, M. Wiklund, Y. Mizutani, F.M. Rotella, Tadahiro Kuroda, Junji Ogawa, William F. Walker, Nikola Nedovic
Rok vydání:	2007
Předmět:	Digital electronics Computer science business.industry Chip Multiplexer Voltage-controlled oscillator CMOS Electronic engineering Bit error rate Oversampling Current-mode logic business Clock recovery Jitter
Zdroj:	ISSCC
DOI:	10.1109/isscc.2007.373375
Popis:	A 3times oversampling CDR and 1:16 DEMUX occupies 0.8 times 1.8mm2 in a 90nm CMOS process. The chip operates at 40 to 44Gb/s and dissipates 0.91W. Input data is sampled using a 24-phase distributed VCO and a digital CDR recovers 16 bits and a 2.5GHz clock from 48 demultiplexed samples spanning 16UI. Conformance to the ITU G.8251 jitter tolerance mask (BER
Databáze:	OpenAIRE
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