Cost-efficient architecture of IPsec classification engine with TCAM

Autor:	Hayotjon Aliev, Won Sik Chae, HyungWon Kim
Rok vydání:	2017
Předmět:	Speedup Functional verification Cost efficiency Computer science business.industry Network packet computer.internet_protocol ComputerSystemsOrganization_COMPUTER-COMMUNICATIONNETWORKS Cryptographic protocol Software Embedded system IPsec Verilog business computer computer.programming_language
Zdroj:	2017 13th International Computer Engineering Conference (ICENCO).
DOI:	10.1109/icenco.2017.8289756
Popis:	This paper presents an IPsec Protocol Processing Engine with TCAM Optimized for cost and performance multiple packet classification and filtering on the next generation IP networks. The proposed architecture can accelerate the process of IP layer security protocol, by using common TCAM architecture shared for inbound and outbound packet filters. It can substantially reduce the size of TCAM, while maintaining the speed of the searching and matching process. The proposed IPsec classification engine has been implemented in an NS-3 simulator for functional verification, and also in Verilog for performance and cost analysis. We demonstrate that the proposed architecture can reduce the TCAM by 60% compared with conventional individual TCAM architecture. In addition, the proposed architecture can speed up the classification process by 15 times over software based IPsec classification.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::e7a21936e87ad4777b74e8017c6cab35 https://doi.org/10.1109/icenco.2017.8289756 Zobrazit plný text záznamu