Low VMIN 20nm embedded SRAM with multi-voltage wordline control based read and write assist techniques

Autor: Abhishek Baradia, Andy Wangkun Chen, Mudit Bhargava, Bikas Maiti, Jacek Wiatrowski, Vincent Schuppe, Sriram Thyagarajan, Gus Yeung, Yew Keong Chong, Hsin-Yu Chen, Gerald Gouya, Sanjay Mangal, Martin Kinkade
Rok vydání: 2014
Předmět:
Zdroj: VLSIC
DOI: 10.1109/vlsic.2014.6858412
Popis: Measured results of V MIN from 20nm SRAM arrays with read and write assist techniques are presented for multiple flavors of bitcell. A novel assist technique is presented, that provides both read and write assist by controlling only the voltage of wordline (WL) and without using a separate supply voltage. The WL-drivers use a WL float technique to reduce the dc-path current compared to existing WL under-drive read assist designs. The assist technique resulted in a V MIN improvement of 143mV for the high-density 6T (6T-HD) SRAM, 96mV for the high-speed 6T (6T-HS) SRAM, and 86mV for the 8T dual-port (DP) SRAM.
Databáze: OpenAIRE