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In this paper we present an energy and area efficient Neuro Connection Map (NCM) which features high fan-out connection to improve the core utilization for large scale neuromorphic system. To meet the stringent power and area requirements, we propose to deploy multi-Vth memory cell design for performance-leakage optimization, localized priority encoder for area/power minimization and finally a decoder-less SRAM for area saving. Our measurements at 1 V supply show that the whole design consumes only 819nW of leakage power. Read and search power are at 5.9μW/MHz and 14.8μW/MHz, respectively. When used in a neuro core with average 100 spikes per neuron per second, the NCM consumes only 0.2pJ/Synaptic event at 1V, making it highly suitable for energy-efficient neuromorphic computing applications. |
