| Popis: |
In this paper, we proposed an high-speed and low-power off-chip data bus interface based on the best coding schemes in this hard operative condition. We analyzed the clustered bus invert method and the bus switch coding, a newly proposed approach based on bus lines logically re-ordered. We proposed an high speed and low-power bus interface based on the combined employment of these two approaches controlled by a 9-rules Takagi-Sugeno analog fuzzy controller. The controller analyzes the binary traffic statistical property changing on the fly the used coding scheme. The fuzzy controller has been designed taking care of total energy dissipation such to do not compromise the benefit of coding approaches. The controller is able also to re-configure the bus switch sub-section in an operative condition where original approach introduces strong power losses. We demonstrated the effectiveness of the approach designing at transistor level the analog fuzzy controller and the digital part of the bus interface. Simulation conducted with H-SPICE and NANOSIM confirmed the bus interface is the optimal trade-off for reducing dynamic energy in off-chip buses. |
