Low-Power Redundant-Transition-Free TSPC Dual-Edge-Triggering Flip-Flop Using Single-Transistor-Clocked Buffer

Autor:	Zisong Wang, Peiyi Zhao, Tom Springer, Congyi Zhu, Jaccob Mau, Andrew Wells, Yinshui Xia, Lingli Wang
Rok vydání:	2023
Předmět:	Hardware and Architecture Electrical and Electronic Engineering Software
Zdroj:	IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 31:706-710
ISSN:	1557-9999 1063-8210
DOI:	10.1109/tvlsi.2023.3251286
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::e53d678b380fc4ac9d06867f81cacbad https://doi.org/10.1109/tvlsi.2023.3251286 Zobrazit plný text záznamu