Design approach for a Low Power video decoder

Autor:	Matheus B. E. Rodrigues, Fabricio G. L. Melo, Elmar U. K. Melcher, Henrique N. Cunha, Maria L. Nascimento
Rok vydání:	2009
Předmět:	CMOS Computer science Low-power electronics Video decoder Electronic engineering Electrical efficiency Die (integrated circuit) Efficient energy use Power (physics) Voltage
Zdroj:	2009 17th IFIP International Conference on Very Large Scale Integration (VLSI-SoC).
DOI:	10.1109/vlsisoc.2009.6041363
Popis:	This paper presents a detailed description of the design of a Low Power, SystemC-RTL, OCP-IP compliant MPEG-4 decoder IP-core, named Terpsicore. The Terpsicore was designed for use in embedded systems where low cost, high performance and power efficiency are important. This design supports simple profile L0 with two external memories, was manufactured using a 0.35um CMOS 4ML technology and has a die of 49mm2 comprising 48095 gates. It consumes 115mW at 25MHz when video encoding of QCIF at 15fps with a voltage supply of 3.3V. Compared with other implementations of the MPEG-4 standard available in the market, the Terpsicore presents better energy efficiency and this paper shows how this was achieved.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::e52d919d033412e96f362b1c0ab99fc8 https://doi.org/10.1109/vlsisoc.2009.6041363 Zobrazit plný text záznamu