| Autor: |
O. Joeressen, M. Oerder, R. Serra, Heinrich Meyr |
| Rok vydání: |
1992 |
| Předmět: |
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| Zdroj: |
IEE Proceedings G Circuits, Devices and Systems. 139:222 |
| ISSN: |
0956-3768 |
| Popis: |
The advances in VLSI technology have made the digital implementation of data receivers feasible at very high data rates. Aspects of the design of a chip set representing a 100 Mbit/s digital receiver for coded 8-PSK modulation are described. The receiver is discussed as an example of complex system design and finally implementation aspects are presented. Special emphasis is given to design methodology, trade-off optimisation and performance results. Attention is paid to the structural and algorithmic design as an integral part of the implementation process to obtain an efficient solution. > |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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