Scaled Static Analysis and IP Reuse for Out-of-Order Parallel SystemC Simulation
| Autor: | Rainer Dömer, Tim Schmidt, Zhongqi Cheng |
|---|---|
| Rok vydání: | 2020 |
| Předmět: |
010302 applied physics
Speedup Source code Computer science media_common.quotation_subject Design flow 02 engineering and technology Parallel computing Static analysis Reuse computer.software_genre 01 natural sciences 020202 computer hardware & architecture Theoretical Computer Science SystemC 0103 physical sciences 0202 electrical engineering electronic engineering information engineering Compiler Discrete event simulation computer Software Information Systems computer.programming_language media_common |
| Zdroj: | International Journal of Parallel Programming. 49:200-215 |
| ISSN: | 1573-7640 0885-7458 |
| DOI: | 10.1007/s10766-020-00668-w |
| Popis: | To preserve the SystemC semantics under parallel discrete event simulation, a compiler based approach statically analyzes race conditions in the design model. However, there are severe restrictions: the source code for the input design must be available in one file, which does not scale. This disables the use of intellectual property (IP) and hierarchical file structures. This paper scales the static analysis design flow to support separate files and IP reuse by introducing partial segment graph and partial port mapping abstractions and prevent IP security leakage. Experiments demonstrate the effective design flow and sustained speedup with parallel IPs. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|
Full text from SpringerLink