| Autor: |
ChaGyu Song, Choonheung Lee, Gyuwan Han, Jinseong Kim, YeSeul Ahn, Juhoon Yoon |
| Rok vydání: |
2015 |
| Předmět: |
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| Zdroj: |
2015 IEEE 65th Electronic Components and Technology Conference (ECTC). |
| DOI: |
10.1109/ectc.2015.7159696 |
| Popis: |
Advanced flip chip packaging technology supports the next generation of products with increased die complexities. The increase in complexity and functionality has been driving the need to investigate fine-pitch interconnection technology with 3D integration. Recently, Package on Package (PoP) has emerged as the preferred 3D integration of logic processors and memory devices for mobile handsets and portable applications. The current PoP solution consists of memory die in the top package stacked on logic function die in the bottom package. Various challenges also need to be met to support the volume production and establish reliable manufacturing process for PoP platform. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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