Cort-X II: The Low-Power Element Design for a Dynamic Neural Network
Autor: | Jie Yuan, Ning Song, J. Van der Spiegel, Nabil H. Farhat |
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Rok vydání: | 2007 |
Předmět: | |
Zdroj: | IEEE Transactions on Circuits and Systems II: Express Briefs. 54:1130-1134 |
ISSN: | 1558-3791 1549-7747 |
DOI: | 10.1109/tcsii.2007.905882 |
Popis: | The parametrically coupled logistic map network (PCLMN) can serve as the front-end dynamic neural network (DNNs) for clustering and generation of spatio-temporal patterns. In this brief, the element of the PCLMN is designed in a 0.25-mum 2.5-V CMOS process for low power consumption. The analog design employs self-calibration techniques to improve the accuracy of the low-power element. After calibration, the fabricated element is able to generate a 1-D map and the nonlinear interconnection in 4-bit resolution for driving signals up to 1 MHz, with a power consumption of 12 mW. |
Databáze: | OpenAIRE |
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