Implementation of Low Power Null Conventional Logic Function for Configuration Logic Block
| Autor: | P. Rajasekar, C. S. Subash Kumar |
|---|---|
| Rok vydání: | 2019 |
| Předmět: |
Very-large-scale integration
Synchronous circuit Logic block Clock signal Computer science Transistor 020206 networking & telecommunications 02 engineering and technology Logic model Computer Science Applications law.invention Logic synthesis law Asynchronous communication Logic gate Hardware_INTEGRATEDCIRCUITS 0202 electrical engineering electronic engineering information engineering Electronic engineering 020201 artificial intelligence & image processing Electrical and Electronic Engineering Cmos process Field-programmable gate array Hardware_LOGICDESIGN Electronic circuit |
| Zdroj: | Wireless Personal Communications. 107:2231-2245 |
| ISSN: | 1572-834X 0929-6212 |
| Popis: | Todays, transistor level design plays major impact in the power consumption of the VLSI based design. The various logic design models are used to reduce the power consumption that includes synchronous and asynchronous design model. The operation of synchronous circuit is limited by the in phase factor of the clock pulse signal which is used to control the synchronous circuit. In contrast, asynchronous circuits are used widely because it causes low noise, require less power. It affects the less electromagnetic interference that allows reuse of the components. These asynchronous circuits are being implemented by Null Conventional Logic (NCL) which is a delay insensitive logic model. The Configuration Logic Block is the power consuming model in Field Programmable Gate Array (FPGA). This block contains the lookup table (LUT) and 27 fundamental NCL logic gates. To reduce the power consumption of this module, we use the Differential Cascade Voltage Switch Logic (DVSL). The power reduction is achieved in LUT by means of DVSL and minimizes the number transistors. This NCL, DVSL, FPGA logic element is simulated using 90 nm TSMC CMOS processing technology. |
| Databáze: | OpenAIRE |
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