The best-case power-delay products for polysilicon-contacted bipolar-transistor gates. A theoretical study
| Autor: | D.E. Burk, S.-Y. Yung |
|---|---|
| Rok vydání: | 2003 |
| Předmět: |
Materials science
Silicon business.industry Heterostructure-emitter bipolar transistor Bipolar junction transistor Transistor Electrical engineering chemistry.chemical_element Condensed Matter::Mesoscopic Systems and Quantum Hall Effect Computer Science::Other law.invention Power (physics) Computer Science::Hardware Architecture Computer Science::Emerging Technologies Current injection technique chemistry law Optoelectronics business Common emitter |
| Zdroj: | Proceedings of the 1988 Bipolar Circuits and Technology Meeting. |
| DOI: | 10.1109/bipol.1988.51085 |
| Popis: | The best-case power-delay products for bipolar-transistor gates that have optimally designed transistors with polysilicon-contacted emitters, both with and without interfacial layers between the polysilicon and underlying emitter, are predicted. It is shown that gates that have one or the other of these contacted-resistors have comparable power-delay products. Because this modeling is very general, it is believed the results are applicable for arsenic as well as phosphorous-doped polysilicon-contacted bipolar transistors. > |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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