Design of efficient coplanar 1-bit comparator circuit in QCA technology
| Autor: | Hamid Mahmoodian, Ahmadreza Shiri, Abdalhossein Rezai |
|---|---|
| Rok vydání: | 2019 |
| Předmět: |
Digital electronics
020203 distributed computing Comparator Computer science business.industry 020208 electrical & electronic engineering Antenna aperture Quantum dot cellular automaton Hardware_PERFORMANCEANDRELIABILITY 02 engineering and technology XNOR gate Hardware_INTEGRATEDCIRCUITS 0202 electrical engineering electronic engineering information engineering Electronic engineering General Earth and Planetary Sciences Inverter business High performance design Hardware_LOGICDESIGN General Environmental Science Electronic circuit |
| Zdroj: | Facta universitatis - series: Electronics and Energetics. 32:119-128 |
| ISSN: | 2217-5997 0353-3670 |
| DOI: | 10.2298/fuee1901119s |
| Popis: | QCA technology is an emerging and promising technology for implementation of digital circuits in nano-scale. The comparator circuits play an important role in digital circuits. In this work, a new and efficient coplanar 1-bit comparator circuit is proposed and evaluated in the QCA technology. The designed coplanar 1-bit QCA comparator circuit is constructed based on majority gate, XNOR gate and inverter gate that are designed carefully. The functionality of the designed coplanar 1-bit QCA comparator circuit is verified by using QCADesigner version 2.0.3. The obtained results indicate that the designed 1-bit QCA comparator circuit requires 0.03 ?m2 area and 38 QCA cells. It also has 0.5 clock cycles delay. The comparison demonstrates that the designed QCA comparator circuit provides improvements in comparison with other QCA comparator circuits in terms of effective area, cell count, and delay as well as cost. |
| Databáze: | OpenAIRE |
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