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This book chapter provides an overview about hardware implementations of symmetric crypto algorithms for RFID security. Hardware design for RFID tags is challenging due to the fierce constraints concerning power consumption and chip area. After a general overview about RFID security, the requirements for passive RFID tags will be worked out. Different design measures for low-resource hardware implementations will be presented and their efficiency will be analyzed. The implementation part of this chapter presents a survey of implemented algorithms that are optimized for application in passive RFID tags. The evaluated algorithms include the block ciphers AES, TEA, and XTEA and the commonly used hash functions SHA-256, SHA-1, and MD5. These algorithms are compared with the new upcoming stream ciphers Grain and Trivium. The comparison of the achieved results favors the use of the AES algorithm for application of symmetric cryptography in RFID security. |
