A-CACHE: Alternating Cache Allocation to Conduct Higher Endurance in NVM-Based Caches
| Autor: | Amir Mahdi Hosseini Monazzah, Ensieh Aliagha, Hamed Farbeh, Elham Cheshmikhani |
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| Rok vydání: | 2019 |
| Předmět: |
010302 applied physics
Random access memory Hardware_MEMORYSTRUCTURES business.industry Computer science 02 engineering and technology Leakage power 01 natural sciences 020202 computer hardware & architecture Non-volatile memory Short lifetime Embedded system 0103 physical sciences 0202 electrical engineering electronic engineering information engineering Key (cryptography) System on a chip Cache Electrical and Electronic Engineering Resource management (computing) business |
| Zdroj: | IEEE Transactions on Circuits and Systems II: Express Briefs. 66:1237-1241 |
| ISSN: | 1558-3791 1549-7747 |
| DOI: | 10.1109/tcsii.2018.2881175 |
| Popis: | Recent developments in non-volatile memories (NVMs) have introduced them as an alternative for SRAMs in on-chip caches. Besides the promising features of NVMs, e.g., near-zero leakage power, immunity to radiation-induced particle strike, and higher density, a major drawback of NVM-based caches is their short lifetime due to limited write endurance. This brief first reveals that in L1 caches, the lifetime of data-cache is about 472 $\times$ shorter than that of instruction-cache (I-cache) due to extreme imbalance write stress between the two. Then, we propose a technique, so-called alternating cache allocation to conduct higher endurance (A-CACHE), to improve the lifetime of frequently written D-cache by exploiting rarely written I-cache. The key idea in A-CACHE is to alternate the locations of storing instructions and data between I-cache and D-cache. The evaluation results show that A-CACHE improves the lifetime of the cache by 83% with negligible overheads. |
| Databáze: | OpenAIRE |
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