A Single-Trim Switched Capacitor CMOS Bandgap Reference With a 3σ Inaccuracy of +0.02%, −0.12% for Battery-Monitoring Applications
| Autor: | Ho-Jin Kim, Kang-Il Cho, Gil-Cho Ahn, Seung-Hoon Lee, Jun-Ho Boo, Yong-Sik Kwak, Jae-Geun Lim |
|---|---|
| Rok vydání: | 2021 |
| Předmět: | |
| Zdroj: | IEEE Journal of Solid-State Circuits. 56:1197-1206 |
| ISSN: | 1558-173X 0018-9200 |
| DOI: | 10.1109/jssc.2020.3044165 |
| Popis: | This article presents a single-trim switched capacitor (SC) CMOS bandgap reference (BGR) for battery monitoring applications. For a single-temperature trimming, $\beta $ -compensation and curvature correction techniques are employed to minimize non-proportional-to-absolute-temperature (PTAT) errors. In conjunction with these techniques, this article proposes dynamic element matching (DEM) techniques with low-pass filtering which employs the decimation filter of a delta-sigma analog-to-digital converter (ADC) in a digital domain. It achieves a further reduction of non-PTAT errors resulting from mismatches of the bias current, of the PNP transistor current gain ( $\beta $ ), and of the gain coefficient in the SC summing amplifier. The remaining PTAT errors are canceled out using a single room-temperature trimming. The bandgap circuit is implemented using vertical PNP transistors with a $\beta $ of about 2.7 at 27 °C in a 0.18- $\mu \text{m}$ CMOS process. The proposed SC BGR achieves a $3\sigma $ inaccuracy of +0.02%, −0.12% from −40 °C to 125 °C. From a 1.8-V supply voltage, it consumes $17~\mu \text{A}$ at 27 °C and occupies an active area of 0.38 mm2. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|