| Autor: |
Dheeraj Mishra, Yudhisthir Pandey, Kavita Singh, Shivam Maurya, Awakash Mishra |
| Rok vydání: |
2019 |
| Předmět: |
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| Zdroj: |
2019 IEEE International Conference on Electrical, Computer and Communication Technologies (ICECCT). |
| DOI: |
10.1109/icecct.2019.8869424 |
| Popis: |
In the recent years the multilevel inverters were widely discussed topic for researchers. Because of few merits of having good power quality. Basically inverter is a converter, which is capable in converting the DC power into AC power at desired level. The two level output, zero or positive or negative V dc can be obtained by voltage source inverter(VSI). The multilevel inverter is capable to produce sinusoidal output voltage and to reduce Total Harmonic Distortion at desired voltage level. As we increase the level of voltage, the output power quality gets improved, i.e. THD gets reduced. This paper proposes the implementation and analysis of cascaded multilevel inverter with reduce THD. The implemented Cascaded H-bridge Multilevel Inverter topology is a practical topology; it provides the generalized path to increase the level of multilevel inverter as we want. In the represented model of eleven level single phase Cascaded H-bridge Multilevel Inverter has been designed using IGBT in order to generate the different output voltage levels at proper intervals, the conduction angle of IGBTs have been controlled by varying the pulse width of getting signals. Simulation models is developed in MATLAB-SIMULINK of eleven levels inverters and THD analysis is performed. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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