Fabrication of a Paper Memory Transistor by Using a Solution Process
| Autor: | Dae Hee Han, Min Gee Kim, Kyung Eun Park, Seung Pil Han, Byung Eun Park, Soo Yong Kim, Gwang Geun Lee |
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| Rok vydání: | 2020 |
| Předmět: |
010302 applied physics
Materials science Fabrication business.industry Transistor General Physics and Astronomy Hardware_PERFORMANCEANDRELIABILITY 02 engineering and technology Substrate (electronics) 021001 nanoscience & nanotechnology Gate voltage 01 natural sciences Ferroelectricity law.invention Hardware_GENERAL law 0103 physical sciences Memory window Hardware_INTEGRATEDCIRCUITS Optoelectronics 0210 nano-technology business Solution process Sol-gel |
| Zdroj: | Journal of the Korean Physical Society. 76:1088-1091 |
| ISSN: | 1976-8524 0374-4884 |
| Popis: | Paper transistors have the advantages of recyclability, high abundance, low cost, disposability, and biodegradability. In this paper, a nonvolatile transistor fabricated on a paper substrate without protective layers by using solution-based methods is presented, and promising performance is reported. The memory window of ferroelectric field-effect transistors is approximately 16 V when the gate voltage is swept from +20 V to -20 V. The on/off ratio is 3.45 × 102, even on the paper substrate. Electrical characteristics of the memory device are not degraded, as compared with those of transistors on rigid substrates fabricated simultaneously. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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