Leakage and process variation effects in current testing on future CMOS circuits
| Autor: | S. Narendra, Ali Keshavarzi, Manoj Sachdev, Kaushik Roy, Vivek De, Charles F. Hawkins, James W. Tschanz, W.R. Daasch |
|---|---|
| Rok vydání: | 2002 |
| Předmět: |
Engineering
business.industry Transistor Electrical engineering Operating frequency Hardware_PERFORMANCEANDRELIABILITY law.invention Process variation CMOS Hardware and Architecture law Hardware_INTEGRATEDCIRCUITS Technology scaling Electronic engineering Electrical and Electronic Engineering business Cmos process Software Leakage (electronics) Electronic circuit |
| Zdroj: | IEEE Design & Test of Computers. 19:36-43 |
| ISSN: | 0740-7475 |
| Popis: | Barriers to technology scaling, such as leakage and parameter variations, challenge the effectiveness of current-based test techniques. This correlative multiparameter test approach improves current testing sensitivity, exploiting dependencies of transistor and circuit leakage on operating frequency, temperature, and body bias to discriminate fast but intrinsically leaky ICs from defective ones. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|