A 0.8 V Low-Power 3rd order Sigma-Delta Modulator in 22 nm FDSOI CMOS Process for Sensor Interfaces
| Autor: | David Borggreve, Erkan Nevzat Isa, Frank Vanselow, Linus Maurer, Pragoti Pran Bora |
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| Rok vydání: | 2019 |
| Předmět: |
Materials science
business.industry Dynamic range Amplifier Transconductance 020208 electrical & electronic engineering Silicon on insulator Hardware_PERFORMANCEANDRELIABILITY 02 engineering and technology Delta-sigma modulation Hardware_INTEGRATEDCIRCUITS 0202 electrical engineering electronic engineering information engineering Optoelectronics business Low voltage Electronic circuit Voltage |
| Zdroj: | NEWCAS |
| DOI: | 10.1109/newcas44328.2019.8961236 |
| Popis: | We present the design of a low-power 3rd order sigma-delta (ΣΔ) modulator targeted for sensor applications. The circuit is implemented in the 22 nm Fully Depleted Silicon on Insulator (FDSOI) CMOS process technology from GlobalFoundries. The modulator features a single-loop feedforward architecture. Low-voltage operation of the fully-differential switched-capacitor based modulator is achieved with enhanced bootstrapped switches for highly linear sampling., and operational transconductance amplifiers (OTAs) operating in weak inversion. The on-chip area of the modulator is 0.193 mm2. The measurement results show that operating over a signal bandwidth of 500 Hz at a nominal supply voltage of 0.8 V and a sampling rate of 512 kHz., the modulator achieves a peak signal-to-noise-and-distortion ratio (SNDR) of 89 dB and a dynamic range of 94 dB. The total average power consumption of the designed modulator, including that of the auxiliary circuits, is 170 µW. |
| Databáze: | OpenAIRE |
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