End-to-End Verification of 'Equation missing' Processors with ISA-Formal
| Autor: | Ali Mustafa Zaidi, Rick Chen, Anastasios Deligiannis, David Gilday, Ashan Pathirane, David Hoyes, Owen Shepherd, Will Keen, Peter Vrabel, Alastair Reid |
|---|---|
| Rok vydání: | 2016 |
| Předmět: |
Computer science
business.industry Register file 02 engineering and technology Reuse 020202 computer hardware & architecture Intelligent verification Design styles End-to-end principle Return on investment 0202 electrical engineering electronic engineering information engineering 020201 artificial intelligence & image processing Software engineering business Formal verification Range (computer programming) |
| Zdroj: | Computer Aided Verification ISBN: 9783319415390 CAV (2) |
| DOI: | 10.1007/978-3-319-41540-6_3 |
| Popis: | Despite 20+ years of research on processor verification, it remains hard to use formal verification techniques in commercial processor development. There are two significant factors: scaling issues and return on investment. The scaling issues include the size of modern processor specifications, the size/complexity of processor designs, the size of design/verification teams and the (non)availability of enough formal verification experts. The return on investment issues include the need to start catching bugs early in development, the need to continue catching bugs throughout development, and the need to be able to reuse verification IP, tools and techniques across a wide range of design styles. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|