A 35 GS/s 5-Bit SiGe BiCMOS flash ADC with offset corrected exclusive-or comparator
| Autor: | K.A. Fritz, R.A. Philpott, Barry K. Gilbert, J.S. Humble, M.A. Daun-Lindberg, R.A. Kertis, E.S. Daniel, J.F. Prairie, D.J. Schwab |
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| Rok vydání: | 2008 |
| Předmět: |
Engineering
Comparator business.industry Bandwidth (signal processing) Electrical engineering Hardware_PERFORMANCEANDRELIABILITY Integrated circuit BiCMOS Flash ADC law.invention Silicon-germanium Effective number of bits chemistry.chemical_compound chemistry law Hardware_INTEGRATEDCIRCUITS Electronic engineering Wafer testing Hardware_ARITHMETICANDLOGICSTRUCTURES business |
| Zdroj: | 2008 IEEE Bipolar/BiCMOS Circuits and Technology Meeting. |
| DOI: | 10.1109/bipol.2008.4662755 |
| Popis: | The design and wafer probe test results of a 5-bit SiGe ADC are presented. The integrated circuit, fabricated in a 200/250 GHz fT/Fmax, SiGe BiCMOS technology, provides a 5-bit analog to digital conversion with input tone frequencies up to 20 GHz and sampling clock rates up to 35 GS/s. The ADC makes use of a comparator with an integrated exclusive-or function to reduce power consumption. The device also generates two half-rate interleaved outputs to ease in data capturing with laboratory equipment. An effective number of bits (ENOB) of nearly 5.0 is achieved for low frequency input tones, dropping to 4.0 at 10 GHz. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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