| Autor: |
Jae Wook Shim, Gab Joong Jeong, Moon Key Lee, Seung Han Ahn |
| Rok vydání: |
2002 |
| Předmět: |
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| Zdroj: |
ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187). |
| DOI: |
10.1109/iscas.1998.706853 |
| Popis: |
This paper describes the architecture of a scalable shared buffer ATM switch and VLSI implementation. It provides scalability in port size and buffer size. The prototype chip has been designed for 4/spl times/4 ATM switch which has a shared buffer for 128 ATM cells. It is integrated in 0.6 /spl mu/m twin well, double-metal, and single-poly CMOS technology. Operating frequency is 80 MHz. Core size is 11/spl times/10 mm/sup 2/. It supports 622 Mbps per port. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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