| Autor: |
Yasuto Kuroda, Hideyuki Noda, Teruhiko Amano, Koji Nii, Hiroyuki Kawai, Katsumi Dosaka, Masaya Shirata, Isamu Hayashi, Koji Hayano, Naoya Watanabe, Sizuo Morizane, Yuji Yano |
| Rok vydání: |
2012 |
| Předmět: |
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| Zdroj: |
2012 IEEE Asian Solid State Circuits Conference (A-SSCC). |
| DOI: |
10.1109/ipec.2012.6522628 |
| Popis: |
An 18Mb full ternary CAM with low voltage match line sense amplifier (LV-MA) is designed and fabricated in 65-nm bulk CMOS process. The die size is 99.06 mm2. The proposed LV-MA reduces the dynamic power consumption of match-lines to 33% compared to conventional one and realizes 42 % fast match-line sensing. The power consumption of fully paralleled search operation at 125-MHz is 5.1 W, which is 63% smaller than previous work. At 1.0V typical supply voltage, the 250-MHz search frequency is achieved. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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