IBM POWER9 opens up a new era of acceleration enablement: OpenCAPI
| Autor: | C. Wollbrink, L. B. Arimilli, B. Allison, Bartholomew Blaner, Jeffrey A. Stuecheli, William J. Starke, J. D. Irish, Daniel M. Dreps |
|---|---|
| Rok vydání: | 2018 |
| Předmět: |
General Computer Science
Computer science business.industry Interface (computing) Physical layer SerDes 020206 networking & telecommunications 02 engineering and technology 020204 information systems Embedded system 0202 electrical engineering electronic engineering information engineering Link layer Cache Latency (engineering) business Host (network) Direct memory access |
| Zdroj: | IBM Journal of Research and Development. 62:8:1-8:8 |
| ISSN: | 0018-8646 |
| Popis: | Open Coherent Accelerator Processor Interface (OpenCAPI) is a new industry-standard device interface that enables the development of host-agnostic devices that can coherently connect to any host platform that supports the OpenCAPI standard. This in turn allows such devices to coherently cache host memory to facilitate accelerator execution, perform direct memory access and atomics to host memory, send messages and interrupts to the host, and act as a host memory home agent. OpenCAPI utilizes high-frequency differential signaling technology while providing the high bandwidth and low latency needed by advanced accelerators. OpenCAPI encapsulates the serializing cache access and address translation constructs in high-speed host silicon technology to minimize overhead and design complexity in attached silicon such as field-programmable gate arrays and application-specific integrated circuits. Finally, OpenCAPI architecturally ties together transaction layer, link layer, and physical layer attributes to optimally align to high serializer/deserializer (SerDes) ratios and enable high-bandwidth, highly parallel exploitation of attached silicon. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|