| Autor: |
James Kao, Z. Dong, M. Chennam, David S. Trager, Richard A. Johnson, R. Poorfard, A. Maxim, T. Nutt, P. Crawley |
| Rok vydání: |
2007 |
| Předmět: |
|
| Zdroj: |
2007 IEEE Radio and Wireless Symposium. |
| DOI: |
10.1109/rws.2007.351759 |
| Popis: |
A fully-integrated digital low-IF DVB-S/DVB-S2 satellite TV tuner was realized in 0.13 μm CMOS. It uses a first analog down-conversion to a sliding low-IF, followed by digitization, a second digital mixing to baseband and digital channel selection. Performing more signal processing in the digital domain lead to a relaxation of the RF front-end specifications, allowing its CMOS implementation. The digital low-IF architecture provides a digital power estimation and allows the use of a discrete-step AGC loop that results in a lower noise and linearity degradation in comparison with continuous AGC loops. Digital calibration is used throughout the DVB tuner, minimizing the gain variation over corners and relaxing the noise and linearity constraints. Partitioning the DVB-S2 receiver into a front-end tuner IC built in a mixed-signal CMOS process and a back-end demodulator and MPEG processor IC implemented in a straight digital CMOS process minimizes the receiver cost |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
|
