Verification of Open-Source Memory Compiler Framework with a Practical PDK
| Autor: | Daiki Ishikawa, Shigetoshi Nakatake, Shoya Kudo, Chao Geng |
|---|---|
| Rok vydání: | 2021 |
| Předmět: |
Hardware_MEMORYSTRUCTURES
Computer science business.industry Process (computing) Process design Hardware_PERFORMANCEANDRELIABILITY Chip computer.software_genre Reliability (semiconductor) Embedded system Hardware_INTEGRATEDCIRCUITS Static random-access memory Compiler business Cmos process computer Electronic circuit |
| Zdroj: | 2021 4th International Conference on Circuits, Systems and Simulation (ICCSS). |
| DOI: | 10.1109/iccss51193.2021.9464193 |
| Popis: | An open-source memory compiler has recently drawn the attention of academic researchers involved in Static Random Access Memory (SRAM) designs. Since simulation results for circuits implemented by practical Process Design Kits (PDKs) have rarely been reported so far, the effectiveness and the reliability for circuit implementation by compiler still needs to be further verified. This paper presents an SRAM circuit implemented in a 0.6μm/±2.5V CMOS process with the compiler framework. We present pre- and post-layout simulation results with respect to the functionality and various performance parameters of our SRAM circuit, and the simulation results are thoroughly analyzed. A summary for our SRAM circuit demonstrates the effectiveness and the reliability of the compiler to design an SRAM in a fabricable technology process, showing a promising result for the compiler to be verified on a fabricated chip. |
| Databáze: | OpenAIRE |
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