Hybrid Analog-Digital Beamforming Design for SE and EE Maximization in Massive MIMO Networks
| Autor: | Andre L. F. de Almeida, Khaled Ardah, Gabor Fodor, Yuri C. B. Silva, Walter C. Freitas |
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| Rok vydání: | 2020 |
| Předmět: |
Beamforming
Computer Networks and Communications Computer science MIMO Aerospace Engineering 020302 automobile design & engineering 02 engineering and technology Maximization Spectral efficiency Domain (software engineering) 0203 mechanical engineering Automotive Engineering Electronic engineering Radio frequency Electrical and Electronic Engineering Joint (audio engineering) Efficient energy use |
| Zdroj: | IEEE Transactions on Vehicular Technology. 69:377-389 |
| ISSN: | 1939-9359 0018-9545 |
| DOI: | 10.1109/tvt.2019.2933305 |
| Popis: | Hybrid analog-digital (HAD) beamforming architectures have been proposed to facilitate the practical implementation of massive multiple-input multiple-output (MIMO) systems by reducing the number of employed radio frequency chains. While most prior studies have aimed to maximize spectral efficiency (SE), the present paper proposes a two-stage HAD beamforming design for multi-user MIMO systems that can be used to maximize either the system's overall energy efficiency (EE) or SE. This problem is nonconvex and NP-hard due to the joint optimization between the analog and digital domains and the constant modulus constraints required by the analog domain. To address this problem, we propose a decoupled two-stage design wherein the first stage, the analog beamforming parts are updated, which are then taken into account in the second stage to design the digital beamforming parts to maximize the system's EE or SE. We consider two widely-used HAD beamforming techniques that utilize either fully-connected (FC) or partially-connected (PC) architectures employing variable phase-shifters. Using the most recently available data for the circuitry power consumption of the components, we compare the performance of these two HAD architectures with that of the fully-digital (FD) architecture in terms of the total circuitry power consumption, and achieved SE and EE. We find that there is a certain number of users above which the FC architecture has higher circuitry power consumption than the FD counterpart, in contrast to the PC architecture that always has lower circuitry power consumption. More importantly, our results reveal, contrary to the common opinion, that depending on the circuitry parameters the FD architecture may achieve not only higher SE, but also higher EE than the HAD architectures. |
| Databáze: | OpenAIRE |
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