Image Edge Detectors under Different Noise Levels with FPGA Implementations
| Autor: | Safaa Henno, Talal Bonny |
|---|---|
| Rok vydání: | 2018 |
| Předmět: |
Computer science
business.industry 020208 electrical & electronic engineering Detector Process (computing) 02 engineering and technology General Medicine Edge detection 020202 computer hardware & architecture Image (mathematics) Image edge Hardware and Architecture 0202 electrical engineering electronic engineering information engineering Computer vision Fpga implementations Noise (video) Artificial intelligence Electrical and Electronic Engineering Field-programmable gate array business |
| Zdroj: | Journal of Circuits, Systems and Computers. 27:1850209 |
| ISSN: | 1793-6454 0218-1266 |
| DOI: | 10.1142/s0218126618502092 |
| Popis: | The process to locate objects in an image passes through different phases. At the forefront of these phases, and most importantly, is the edge detection. If edges in an image are identified accurately, all of the objects will be located correctly for further processing phases. Noisy images contain high-frequency contents which might be interfered with image edges that makes edge detection more difficult. In this paper, a software comparative analysis of the performance of three different edge detectors, namely, Roberts, Prewitt and Sobel, is presented. The comparative analysis is performed to check the performance robustness of the edge detectors when noise level fluctuates in the image. In addition, an embedded hardware (HW) system is developed to implement the three detectors on the Zedboard FPGA prototyping board. The purpose of this implementation is to have an embedded system for on-the-move applications where portability is desired. To exploit the new features of the Xilinx Zynq-7000 series, we partition the implementation into (1) hardware part (running on logic gates of FPGA) and (2) software (SW) part (running on ARM processor of FPGA). This heterogeneous HW/SW implementation allows for high accurate results with high speed and efficient area. Furthermore, a hardware comparative analysis of the speed and area of the detectors is presented. The evaluation is performed by using different images (with their ground truths) downloaded from the BSDS500 dataset. The tools used for FPGA implementation are MATLAB and Microsoft Visual Studio (as software tools), Vivado High-level synthesis (HLS) and Software Development Kit (SDK) (as hardware tools). The experimental results show that the Roberts detector achieves better edge detection when the noise level is higher than 40%. It is also faster and requires less capacity of logic gates among the other detectors employed in this study. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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