Fabrication of dynamic oxide semiconductor random access memory with 3.9 fF storage capacitance and greater than 1 h retention by usingc-axis aligned crystalline oxide semiconductor transistor withLof 60 nm

Autor:	Suguru Hondo, Takashi Okuda, Yuto Yakubo, Kiyoshi Kato, Shunpei Yamazaki, Masumi Nomura, Tatsuya Onuki, Masayuki Sakakura, Masaharu Nagai, Yutaka Okazaki, Yuki Hata, Yoshitaka Yamamoto, Takanori Matsuzaki, Shuhei Nagatsuka, Tomoaki Atsumi
Rok vydání:	2015
Předmět:	Dynamic random-access memory Fabrication Materials science Physics and Astronomy (miscellaneous) business.industry Transistor General Engineering General Physics and Astronomy Capacitance law.invention Capacitor Semiconductor law Optoelectronics business Dram Voltage
Zdroj:	Japanese Journal of Applied Physics. 54:04DD07
ISSN:	1347-4065 0021-4922
DOI:	10.7567/jjap.54.04dd07
Popis:	A dynamic oxide semiconductor random access memory (DOSRAM) array that achieves reduction in storage capacitance (Cs) and decrease in refresh rate has been fabricated by using a c-axis aligned crystalline oxide semiconductor (CAAC-OS) transistor (L = 60 nm) with an extremely low off-state current. We have confirmed that this array, composed of cells that include a CAAC-OS transistor with W/L = 40 nm/60 nm using InGaZnO and a 3.9 fF storage capacitor, operates with write and read times of 5 ns. Therefore, DOSRAM can ensure sufficient Cs while maintaining operation speed comparable to that of dynamic random access memory (DRAM). We have found that the read signal voltage of DOSRAM is changed by approximately 30 mV after 1 h at 85 °C. Thus, DOSRAM is a promising replacement for DRAM.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::d04f2de3f8e7afe0d721e4a41a96e59d https://doi.org/10.7567/jjap.54.04dd07 Zobrazit plný text záznamu