| Popis: |
As device density is continually scaled down, plasma charging damage has become crucial for the fabrication of integrated circuits. By decreasing the design rule below 0.5 /spl mu/m, electrical charging damage and physical damage such as profile distortion, notching and sidewall trench formation have been considered as the major problems in plasma processing. In this paper, the reduction of electrical and physical plasma process-induced damage has been studied by replacing the photoresist mask by a SiO/sub 2/ hard mask for gate poly patterning. For the electrical damage measurements, the charge pumping technique (Groeseneken et al., IEEE Trans. El. Dev. vol. 31, p. 42, 1984) has been used to evaluate the interface trap density (D/sub it/). In addition, modelling of the notching formation and SEM and TEM inspection have been performed to measure the physical damage. |
