Relationship between profile of stressgenerated interface traps and degradation of submicron LDD mosfet's
| Autor: | M. Dutoit, T. Hessler, Serguei Okhonin |
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| Rok vydání: | 1996 |
| Předmět: |
Materials science
Equivalent series resistance business.industry Stress measurement Integrated circuit Condensed Matter Physics Atomic and Molecular Physics and Optics Surfaces Coatings and Films Electronic Optical and Magnetic Materials law.invention Electrical resistance and conductance CMOS law MOSFET Electronic engineering Optoelectronics Electrical and Electronic Engineering Mosfet circuits Safety Risk Reliability and Quality business Saturation (magnetic) |
| Zdroj: | Microelectronics Reliability. 36:1671-1674 |
| ISSN: | 0026-2714 |
| DOI: | 10.1016/0026-2714(96)00171-0 |
| Popis: | By relating the complete spatial interface trap profile to the variation of electrical parameters in n-channel LDD and FOND MOSFET's, we clarify the respective role of defects above the channel and the LDD region. We show that the saturation of the series resistance increase is due to the leveling off of the rate of interface trap generation and not to the self-limiting impact of such defects on the series resistance. The importance of the choice of the parameter, used to estimate the lifetime is demonstrated. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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