ESD Robust Fully Salicided 5-V Integrated Power MOSFET in Submicron CMOS
| Autor: | Manjunatha Prabhu, Jian-Hsing Lee, Natarajan Mahadeva Iyer |
|---|---|
| Rok vydání: | 2017 |
| Předmět: |
010302 applied physics
Ballast Engineering Electrostatic discharge business.industry Transistor Electrical engineering 020206 networking & telecommunications Hardware_PERFORMANCEANDRELIABILITY 02 engineering and technology Salicide 01 natural sciences Electronic Optical and Magnetic Materials law.invention CMOS law 0103 physical sciences MOSFET Hardware_INTEGRATEDCIRCUITS 0202 electrical engineering electronic engineering information engineering Power semiconductor device Electrical and Electronic Engineering Power MOSFET business Hardware_LOGICDESIGN |
| Zdroj: | IEEE Electron Device Letters. 38:623-625 |
| ISSN: | 1558-0563 0741-3106 |
| DOI: | 10.1109/led.2017.2686638 |
| Popis: | A novel high electrostatic discharge (ESD), robust fully salicided 5-V integrated CMOS power MOSFET design is developed and demonstrated without the use of conventional salicide blocking ballast resistor. This scheme builds the ballast resistors on the top of the source and drain, without any increase in silicon footprint unlike prior methods, while maintaining standard transistor parametric performance. |
| Databáze: | OpenAIRE |
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