Binary-decision-diagram-based decomposition of Boolean functions into reversible logic elements
| Autor: | Jia Lee, Rui-Long Yang, Ya-Hui Ye, Xin Huang |
|---|---|
| Rok vydání: | 2020 |
| Předmět: |
General Computer Science
Clock signal Binary decision diagram Computer science 0102 computer and information sciences 02 engineering and technology Topology Data structure 01 natural sciences Theoretical Computer Science Computer Science::Hardware Architecture 010201 computation theory & mathematics Asynchronous communication Computer Science::Logic in Computer Science Logic gate 0202 electrical engineering electronic engineering information engineering 020201 artificial intelligence & image processing Representation (mathematics) Boolean function Finite set Hardware_LOGICDESIGN |
| Zdroj: | Theoretical Computer Science. 814:120-134 |
| ISSN: | 0304-3975 |
| DOI: | 10.1016/j.tcs.2020.01.019 |
| Popis: | A binary decision diagram (BDDs) is a compact data structure used to represent a Boolean function, which facilitates scalable constructions of Boolean functions using reversible logic gates. Motivated by the scalable synthesis approach, this paper proposes an effective scheme for transforming the BDD representation of a Boolean function into a reversible circuit composed by reversible logic elements. Unlike a logic gate, a reversible logic element carries a memory to record a finite number of states. Especially, logic circuits composed by reversible elements can operate in asynchronous mode, thereby no need of a clock signal to drive all elements operating simultaneously. |
| Databáze: | OpenAIRE |
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