A 0.039 mm$^2$ $~$ $\Sigma\Delta$
| Autor: | Robert Weigel, Sebastian Zeller, Thomas Ussmueller, Christian Muenker |
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| Rok vydání: | 2014 |
| Předmět: |
Engineering
Comparator business.industry Topology (electrical circuits) Hardware_PERFORMANCEANDRELIABILITY Delta-sigma modulation law.invention CMOS law Integrator Hardware_INTEGRATEDCIRCUITS Electronic engineering Operational amplifier Inverter Common-mode signal Hardware_ARITHMETICANDLOGICSTRUCTURES Electrical and Electronic Engineering business |
| Zdroj: | IEEE Journal of Solid-State Circuits. 49:1548-1560 |
| ISSN: | 1558-173X 0018-9200 |
| Popis: | We present design techniques for the realization of compact, low-power CT- ΣΔ-ADCs in ultra-deep-submicron CMOS: A resonant single-opamp third-order integrator with loss compensation, an inverter-based opamp with digitally assisted biasing and common mode control, a pseudo-differential modulator topology with quasi-1.5-bit quantization, a jitter-noise-reduction DAC with NRZ pulse shape, a mismatch-tolerant IIR quantizer, linearized single-ended FIR-DACs with passive DT compensation, and a rail-to-rail dynamic latched comparator. A highly compact 41.4 fJ/conv.-step, 77 dB-SFDR, 1.1 V ADC has been implemented to prove these concepts. The entire active analog circuitry in this minimalistic third-order modulator consists of only ten CMOS inverters. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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