A Yield and Reliability Improvement Methodology Based on Logic Redundant Repair with a Repairable Scan Flip-Flop Designed by Push Rule
| Autor: | Jun Matsushima, Michio Komoda, Yoshiaki Fukui, Shigeki Ohbayashi, Nobuhiro Tsuda, Masanori Kurimoto |
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| Rok vydání: | 2012 |
| Předmět: |
Yield (engineering)
Computer science Reliability (computer networking) Hardware_PERFORMANCEANDRELIABILITY Function (mathematics) Chip Computer Graphics and Computer-Aided Design Computer Science Applications Reliability engineering law.invention Logic redundancy law Faulty cell Electrical and Electronic Engineering Flip-flop Replacement method |
| Zdroj: | ACM Transactions on Design Automation of Electronic Systems. 17:1-22 |
| ISSN: | 1557-7309 1084-4309 |
| DOI: | 10.1145/2159542.2159549 |
| Popis: | We propose a yield improvement methodology which repairs a faulty chip due to logic defect by using a repairable scan flip-flop (R-SFF). Our methodology improves area penalty, which is a large issue for logic repair technology in actual products, by using repair grouping and a redundant cell insertion algorithm and by pushing the design rule for the repairable area of R-SFF. Additionally, compared with the conventional method, we reduce the number of wire connections around redundant cells by improving the replacement method of the faulty cell by the redundant cell. The proposed methodology reduces the total area penalty caused by the logic redundant repair to 3.6% and improves the yield, that is the number of good chips on a wafer, by 4.7% when the defect density is 1.0[1/cm^2]. Furthermore, we propose the strategy to repair the in-field failures due to latent defect for the chip whose repair function had not been used in the shipment test. |
| Databáze: | OpenAIRE |
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