Dummy Oxide Removal in High-K Last Process Integration how to Avoid Silicon Corrosion Issue
| Autor: | Hiroaki Takahashi, M. Schaekers, Herbert Struyf, Martine Claes, Paul Mertens, Antoine Pacco, Anabela Veloso, Farid Sebaai, Stefan De Gendt |
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| Rok vydání: | 2012 |
| Předmět: |
Materials science
Silicon business.industry Gate dielectric Metallurgy Oxide chemistry.chemical_element Condensed Matter Physics Atomic and Molecular Physics and Optics chemistry.chemical_compound chemistry Electrode Optoelectronics General Materials Science Tin business Metal gate Layer (electronics) High-κ dielectric |
| Zdroj: | Solid State Phenomena. 195:13-16 |
| ISSN: | 1662-9779 |
| DOI: | 10.4028/www.scientific.net/ssp.195.13 |
| Popis: | The industry has diverged into two main approaches for high-k and metal gate (HKMG) integration. One is the so called gate-first. The other is gate-last, also called replacement metal gate (RMG) where the gate electrode is deposited after junctions formation and the high-k gate dielectric is deposited in the beginning of the flow (high-k first-RMG) or just prior to gate electrode deposition (high-k last-RMG) [1-. We can distinguish two RMG process flows called either high-k first or high-k last. In RMG high-k first, poly silicon is removed on top of a TiN etch stop layer whereas on high-k last poly silicon is removed on top of a dummy oxide layer. This dummy oxide has also to be removed in order to redeposit a novel high-k and work function metal (Figure 1). |
| Databáze: | OpenAIRE |
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