Low power cross-point memory architecture

Autor:	Christophe Chevallier, Bruce L. Bateman, Chang Siau
Rok vydání:	2011
Předmět:	Engineering Memory management business.industry Sense amplifier Memory architecture Electrical engineering Electronic engineering Registered memory Semiconductor memory Computing with Memory Memory refresh business Computer memory
Zdroj:	A-SSCC
DOI:	10.1109/asscc.2011.6123630
Popis:	Design techniques are described for building cross-point resistive memory arrays without the use of a selection device for each resistive memory element. A memory cell selection technique is shown to allow the use of low voltage transistors and to solve IR drop, electro-migration and disturb issues on the selected array lines. Physical implementation is also presented.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::c8c6398027bded25f37d58971a933d40 https://doi.org/10.1109/asscc.2011.6123630 Zobrazit plný text záznamu