Comprehensive Scaling Study on 3D Cross-Point PCM toward 1Znm Node for SCM Applications
| Autor: | Y. F. Lin, M. Briahtxky, Y. C. Chou, Erh-Kun Lai, Huai-Yu Cheng, H.L. Lung, Cheng-Wei Cheng, C. H. Yang, Kuo I-Ting, A. Rav, Wei-Chih Chien, Nanbo Gong, Robert L. Bruce, Fabio Carta, C. W. Yeh, Lynne Gignac, H. Y. Ho, John M. Papalia, Wanki Kim |
|---|---|
| Rok vydání: | 2019 |
| Předmět: |
010302 applied physics
Hardware_MEMORYSTRUCTURES Computer science business.industry Electrical engineering 02 engineering and technology Chip 01 natural sciences Line (electrical engineering) 020202 computer hardware & architecture Threshold voltage 0103 physical sciences Scalability Hardware_INTEGRATEDCIRCUITS 0202 electrical engineering electronic engineering information engineering Node (circuits) business Tera Scaling Hardware_LOGICDESIGN Voltage |
| Zdroj: | 2019 Symposium on VLSI Technology. |
| DOI: | 10.23919/vlsit.2019.8776516 |
| Popis: | We present a scaling study toward lZnm node 3D Cross-point PCM (XPCM) for Storage Class Memory (SCM) applications. The low operation current, and low metal line loading resistance are desired to avoid a wide operation voltage distribution in a cross-point array. For the first time, AC threshold voltage (Vth) of 1S1R OTS-PCM was studied, which will impact the operation scheme. To achieve Tera bits per chip density, six layers 1Znm 3D XPCM with OTS showing high Vth and low leakage current, and scalable periphery circuit are required. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|