Soft breakdown at all positions along the N-MOSFET
| Autor: | B. E. Weir, P.J. Silverman, Muhammad A. Alam |
|---|---|
| Rok vydání: | 2001 |
| Předmět: |
Materials science
business.industry Gate dielectric Dielectric Condensed Matter Physics Atomic and Molecular Physics and Optics Surfaces Coatings and Films Electronic Optical and Magnetic Materials Reliability (semiconductor) Gate oxide MOSFET Optoelectronics Waveform Electrical and Electronic Engineering business Low voltage Extrinsic semiconductor |
| Zdroj: | Microelectronic Engineering. 59:17-23 |
| ISSN: | 0167-9317 |
| Popis: | We observe soft breakdowns at all positions along the gates of N-MOSFETs when testing is performed at low voltage or with low current compliance. Devices whose breakdown spots are at or near the gate–drain overlap region have the highest off-currents, although not high enough to be fatal to device operation. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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