A 1.2V 1.33Gb/s/pin 8Tb NAND flash memory multi-chip package employing F-chip for low power and high performance storage applications

Autor: Yunhee Choi, Jindo Byun, Bong-Kil Jung, Hyeonggon Kim, Dae-Seok Byeon, Sung-Hoon Kim, Ki-Sung Kim, Yena Lee, Chang-Bum Kim, Chan-Jin Park, Han-Sung Joo, Jaehwan Kim, Young-don Choi, Hyun-Jin Kim, Seungwoo Yu, Nahyun Kim, Jin-Yub Lee, Youngmin Jo, Anil Kavala, Lee Jangwoo, Kye-Hyun Kyung, Jeong-Don Ihm, Kwang-won Kim, Daehoon Na, Pansuk Kwak, Park Jung-June, Kitae Park
Rok vydání: 2017
Předmět:
Zdroj: 2017 Symposium on VLSI Circuits.
Popis: A 1.2 V 1.33Gb/s/pin 8Tb NAND flash memory multi-chip package incorporating 16-die stacked 512-Gb NAND flash memories and F-Chip is presented. To meet the performance requirements of storage devices for higher capacity and faster data throughput, the 2nd generation F-Chip is developed. The F-Chip presents a dual bi-directional transceiver architecture including data retiming and training techniques to adaptively improve signal integrity. Besides, the F-Chip supports 1.2 V I/O for low power storage applications. This work, as a result, shows 33% improvement of eye-opening performances and 41% reduction of I/O power consumption compared to the previous generation.
Databáze: OpenAIRE