Autor: |
Alan J. Weger, Peilin Song, Peter E. Cottrell, Franco Stellari, Mujahid Muhammad, Kiran V. Chatty, Moyra K. McManus, Robert J. Gauthier |
Rok vydání: |
2004 |
Předmět: |
|
Zdroj: |
2004 IEEE International Reliability Physics Symposium. Proceedings. |
Popis: |
An analytical model has been developed to provide physical design guidelines to suppress CDE-induced latchup in CMOS ICs. The design guidelines implemented in two test chips in IBM's 130nm technology successfully suppressed latchup against transient pulses of up to 6A peak current and against DC current pulses (EIA/JESD 78 test) of +/- 400mA. |
Databáze: |
OpenAIRE |
Externí odkaz: |
|