A Reconfigurable Non-Uniform Power-Combining V-Band PA With +17.9 dBm Psat and 26.5% PAE in 16-nm FinFET CMOS
| Autor: | Yanjie Wang, Kun-Da Chu, Stefano Pellerano, Jacques C. Rudell, Christopher D. Hull, Steven Callender |
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| Rok vydání: | 2021 |
| Předmět: | |
| Zdroj: | IEEE Journal of Solid-State Circuits. 56:1502-1513 |
| ISSN: | 1558-173X 0018-9200 |
| Popis: | This article presents the design of a dual-mode V-band power amplifier (PA) that enhances the efficiency at power back-off (PBO) using load modulation. The PA utilizes a reconfigurable two-/four-way power combiner to enable two discrete modes of operation–full power and back-off power. The power combiner employs two techniques to further improve the PA efficiency at PBO: 1) usage of transformers with non-uniform turns ratios to reduce the difference in impedance presented to the PA cores between the two modes and 2) utilize a proposed switching scheme to eliminate the leakage inductance associated with the disabled path in back-off power mode (BPM). The two-stage PA achieves a peak gain of 21.4 dB with a fractional BW (fBW) of 22.6% (51–64 GHz). At 65 GHz, the PA has a Psat of +17.9 dBm with an OP1 dB of +13.5 dBm and a peak power added efficiency (PAE) of 26.5% in full-power mode. In BPM, the measured Psat, OP1 dB, and peak PAE are +13.8 dBm, +9.6 dBm, and 18.4%, respectively. The PAE is enhanced by 6% points at a 4.5-dB back-off. The PA is capable of amplifying a 6 Gb/s 16-QAM modulated signal with an EVMrms of −20.7 dB at an average Pout/PAE of +13 dBm/13.6%, respectively. This PA was implemented in 16-nm FinFET, occupies a core area of 0.107 mm2, and operates under a 0.95-V supply. |
| Databáze: | OpenAIRE |
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