IBM POWER9 processor core
| Autor: | Michael Kroener, J. A. Van Norstrand, Thompto Brian W, Hung Qui Le, José E. Moreira, David A. Hrusecky, M. J. Genden, Dung Quoc Nguyen |
|---|---|
| Rok vydání: | 2018 |
| Předmět: |
Multi-core processor
General Computer Science Computer science business.industry 02 engineering and technology Modular design Microarchitecture law.invention Instruction set Set (abstract data type) Microprocessor Computer architecture law 020204 information systems 0202 electrical engineering electronic engineering information engineering 020201 artificial intelligence & image processing IBM business Range (computer programming) |
| Zdroj: | IBM Journal of Research and Development. 62:2:1-2:12 |
| ISSN: | 0018-8646 |
| DOI: | 10.1147/jrd.2018.2854039 |
| Popis: | The IBM POWER9 processor is the latest Reduced Instruction Set Computer microprocessor from IBM. POWER9 employs a new modular core microarchitecture to counter the technology trend of decreasing frequency and increasing power density from generation to generation. The new POWER9 design enables a family of processors optimized for a broad range of server applications. The new microarchitecture is closely coupled with a rich set of new instructions geared toward data-centric applications. In this paper, we describe the POWER9 core microarchitecture innovations, its new instructions and features, and the exploitation of this new design for computing in the cognitive era. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|