Developing Efficient Implementations of Shortest Paths and Page Rank Algorithms for NEC SX-Aurora TSUBASA Architecture
| Autor: | Ilya V. Afanasyev, Kazuhiko Komatsu, Hiroaki Kobayashi, Vad. V. Voevodin, Vl. V. Voevodin |
|---|---|
| Rok vydání: | 2019 |
| Předmět: |
General Mathematics
010102 general mathematics Pascal (programming language) Page rank 01 natural sciences 010305 fluids & plasmas 0103 physical sciences Graph (abstract data type) Graph algorithms 0101 mathematics Architecture Implementation computer Algorithm Mathematics computer.programming_language |
| Zdroj: | Lobachevskii Journal of Mathematics. 40:1753-1762 |
| ISSN: | 1818-9962 1995-0802 |
| Popis: | The main goal of this paper is to demonstrate that the newest generation of NEC SX-Aurora TSUBASA architecture can perform large-scale graph processing extremely efficiently. This paper proposes approaches, which can be used for the development of high-performance vector-oriented implementations of page rank and shortest paths algorithms, including vectorised graph storage format, efficient vector-friendly graph traversals, optimised cache-aware memory accesses and efficient load-balancing. The developed implementations are optimised according to the most important features and properties of SX-Aurora architecture, which allows them achieve up to 15 times better performance compared to the optimised Intel Skylake parallel implementations and up to 5 times better performance compared to NVGRAPH library implementations for Pascal GPU architecture. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|
Full text from SpringerLink