A Monolithic Hardware Implementation of Kyber: Comparing Apples to Apples in PQC Candidates
| Autor: | Reza Azarderakhsh, Mojtaba Bisheh-Niasar, Mehran Mozaffari-Kermani |
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| Rok vydání: | 2021 |
| Předmět: | |
| Zdroj: | Progress in Cryptology – LATINCRYPT 2021 ISBN: 9783030882372 LATINCRYPT |
| DOI: | 10.1007/978-3-030-88238-9_6 |
| Popis: | With the advent of large-scale quantum computers, factoring and discrete logarithm problems could be solved using the polynomial-time quantum algorithms. To ensure public-key security, a transition to quantum-resistant cryptographic protocols is required. Performance of hardware accelerators targeting different platforms and diverse application goals plays an important role in PQC candidates’ differentiation. Hardware accelerators based on FPGAs and ASICs also provide higher flexibility to create a very low area or ultra-high performance implementations at the high cost of the other. While the hardware/software co-design development of PQC schemes has already received an increasing research effort, a cost analysis of efficient pure hardware implementation is still lacking. On the other hand, since FPGA has various types of hardware resources, evaluating and making the accurate and fair comparison of hardware-based implementations against each other is very challenging. Without a common foundation, apples are compared to oranges. This paper demonstrates a pure hardware architecture for Kyber as one of the finalists in the third round of the NIST post-quantum cryptography standardization process. To enable real, realistic, and comparable evaluations in PQC schemes over hardware platforms, we compare our architecture over the ASIC platform as a common foundation showing that it outperforms the previous works in the literature. |
| Databáze: | OpenAIRE |
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