Computing the initial states of retimed circuits
| Autor: | Robert K. Brayton, H.J. Touati |
|---|---|
| Rok vydání: | 1993 |
| Předmět: |
Combinational logic
Sequential logic Computer science Propagation delay Computer Graphics and Computer-Aided Design Logic synthesis Logic gate Hardware_INTEGRATEDCIRCUITS State (computer science) Electrical and Electronic Engineering Retiming Algorithm Software Hardware_LOGICDESIGN Electronic circuit |
| Zdroj: | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 12:157-162 |
| ISSN: | 1937-4151 0278-0070 |
| Popis: | Retiming is an optimization technique for sequential circuits which consists in modifying the position of latches relative to blocks of combinational logic in order to minimize the maximum propagation delay between latches or to meet a given delay requirement while minimizing the number of latches. If the initial state of the circuit is meaningful, one must compute an equivalent initial state for the retimed circuit after retiming. The authors present a simple linear time algorithm to compute a correct initial state for a retimed circuit that can be used whenever the initial state of the original circuit satisfies a simple condition. If this condition is not originally satisfied, it is shown how it can be automatically enforced by a logic synthesis tool with no need for user intervention. > |
| Databáze: | OpenAIRE |
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