In-Depth Analysis of NBTI at 2X nm Node DRAM
| Autor: | Sungho Jang, E. S. Jung, Hyeongsun Hong, Seung-Uk Han, Satoru Yamada, Sungkweon Baek, Wonchang Jeong, Kijae Huh, Sung-Sam Lee, Junhee Lim, Gyo-Young Jin, Moonyoung Jeong, Kyu-Pil Lee |
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| Rok vydání: | 2016 |
| Předmět: |
010302 applied physics
Random access memory Materials science business.industry Annealing (metallurgy) 020208 electrical & electronic engineering 02 engineering and technology 01 natural sciences Manufacturing cost Silicon-germanium chemistry.chemical_compound chemistry 0103 physical sciences 0202 electrical engineering electronic engineering information engineering Electronic engineering Optoelectronics Mosfet circuits business Dram |
| Zdroj: | 2016 IEEE 8th International Memory Workshop (IMW). |
| DOI: | 10.1109/imw.2016.7495279 |
| Popis: | An analysis on the degradation of DRAM performance caused by the NBTI degradation of p-MOSFET is first to be reported. To improve the NBTI immunity, three candidates are examined. First, minimizing Si-H bonds at Si/SiON interface through controlling the heat-budget at BEOL shows a promising result in NBTI lifetime, but it is not appropriate for DRAM process since it decreases the refresh time. Next, the buried SiGe channel p-MOSFET, which has 1.2 times higher NBTI immunity, is considered but difficult to adopt in DRAM peripheral circuit due to extra manufacturing cost. Finally, a deuterium annealing seems to be the right candidate for DRAM process since it improves the NBTI immunity without the refresh time penalty. This NBTI gain, however, varies depending on the amount of deuterium atom at Si/SiON interface and the probability of Si-D bond replacement with Si-H bond. Thus, selecting a right process sequence and an annealing condition is crucial. |
| Databáze: | OpenAIRE |
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